Functional verification using co-emulation has been on an ascending trend due to its main advantage: testbench acceleration. Co-emulation requires two main things: (1) a connection between the host machine running the testbench and the hardware platform where the design is synthesized, and (2) a software component for interacting with the design. Most currently available solutions for achieving a complete co-emulation environment are proprietary. This paper describes an Open-source Framework for Co-emulation (OFC) used for communication between an UVM-SystemVerilog testbench and a design emulated on the FPGA logic of a PYNQ board. The OFC framework is split into two main components: a TCP sockets based client-server connection and a Python component that interacts with the FPGA using the API provided by Xilinx for the PYNQ board. Due to the modular implementation, these two components can be used together or separately based on the user’s needs.
