Information for Paper ID 1682
Paper Information:
Paper Title: Design of Variable Bit-Width Arithmetic Unit Using Single Flux Quantum Device 
Student Contest: No 
Affiliation Type: Academia 
Keywords: Single Flux Quantum (SFQ), Superconducting Computing 
Abstract: This paper presents a design of ultra-high-speed, low-power arithmetic unit that supports variable bit-width operations with the single flux quantum (SFQ) technology. Because of the high-speed nature of superconductor devices, we can achieve extremely high power-performance efficiency that cannot be achieved by state-of-the-art CMOS devices. To implement the complex function to support the variable bit-width feature, we introduce a novel circuit architecture to maintain the high-speed operation over 50GHz. Our prototype chip design successfully demonstrate 53.5GHz 1.59mW operations. 
Track ID: 5.10 
Track Name: Other Areas in Beyond CMOS 
Secondary Track ID: 2.1 
Secondary Track Name: Datapath & Arithmetic Circuits And Systems 
Final Decision: Accept as Lecture 
Session Name: New Emerging Principles & Applications (Virtual Asia) (Lecture) 
Author Questions:
Participation: Virtual Asia