Special Sessions: State-of-the-Art Solutions for IC Testing Session
Session Type: Lecture
Session Code: C2L-A
Location: Room VR1
Date & Time: Friday June 19, 2020 (10:40 - 11:40)
Chair: None

 

    Papers are listed in the order they will be presented.

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My Sched		Paper
Id		TopicTitle/Author
5097 16.2 Static Linearity BIST for Vcm-Based Switching SAR ADCs Using a Reduced-Code Measurement Technique
Renato Feitoza, Manuel J. Barragan, Antonio Gines, Salvador Mir
5171 16.2 Using Optimized Butterworth-Based ΣΔ Bitstreams for the Testing of High-Resolution Data Converters
Ahmed Emara, Gordon Roberts, Sadok Aouini, Mahdi Parvizi, Naim Ben-Hamida
5179 16.2 Accelerating STT-MRAM Ramp-Up Characterization
Govind Radhakrishnan, Youngki Yoon, Manoj Sachdev
5174 16.2 On the Importance of Bias-Dependent Charge Injection for SET Evaluation in AMS Circuits
Valentin Gutierrez, Gildas Leger
5042 16.2 A New Single Event Transient Hardened Floating Gate Configurable Logic Circuit
Sarah Azimi, Corrado De Sio, Weitao Yang, Luca Sterpone