Digital & Mixed-Circuit Design I: Analog-to-Digital Conversion Session
Session Type: Lecture
Session Code: B1L-A
Location: Room VR1
Date & Time: Thursday June 18, 2020 (09:00 - 10:00)
Chair: None


    Papers are listed in the order they will be presented.

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5103 2 Design Methodology and Timing Considerations for Implementing a TDC on a Cyclone V FPGA Target
Wassim Khaddour, Foudil Dadouche, Wilfried Uhring, Vincent Frick, Morgan Madec
5122 2 Digital Calibration of Capacitor Mismatch and Comparison Offset in Split-CDAC SAR ADCs with Redundancy
Antonio Lopez-Angulo, Antonio Gines, Eduardo Peralias
5132 2 A Hybrid 4th-Order 4-Bit Continuous-Time ∆Σ Modulator in 65-nm CMOS Technology
Ningcheng Gaoding, Jean-Francois Bousquet
5148 2 OTA-Free MASH Two-Step Incremental ADC Based on Noise Shaping SAR ADCs
Masoume Akbari, Mohammad Honarparvar, Yvon Savaria, Mohamad Sawan
5160 2 Non-Linear Calibration of Pipeline ADCs Using a Histogram-Based Estimation of the Redundant INL
Antonio Gines, Gildas Leger, Eduardo Peralias